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general description the max1954a synchronous current-mode, pulse-width modulation (pwm) buck controller is pin compati- ble with the popular max1954 and is suitable for applications where cost and size are critical. the max1954a operates from an input voltage range of 3.0v to 13.2v, independent of the ic supply. the output voltage is adjustable down to 0.8v. the ic operates at a fixed 300khz switching frequency and provides up to 25a of output current with efficiency up to 95%. this controller has excellent transient response resulting in smaller output capacitance. the max1954a features foldback current limiting that greatly reduces input current and component power dissipation during output overload or short-circuit conditions. the compensation and shutdown control (comp) input, in addition to providing compensation to the error amplifier, can be pulled low to shut down the converter. an input undervoltage lockout is provided to ensure proper operation during power sags to prevent the external power mosfets from overheating. internal digital soft-start is included to reduce inrush current and save an external capacitor. the max1954a is available in a tiny 10-pin ?ax package to minimize pc board space. applications printers and scannersgraphic cards and video cards pcs and servers microprocessor cores low-voltage distributed power telecom/networks features ? current-mode controller ? fixed-frequency pwm ? foldback current limit ? output down to 0.8v with 1% fb accuracy ? 3.0v to 13.2v input voltage ? 300khz switching frequency ? 25a output-current capability ? 93% efficiency ? all-n-channel-mosfet design for low cost ? no current-sense resistor needed ? internal digital soft-start ? small 10-pin max package max1954a low-cost, current-mode pwm buck controller with foldback current limit ________________________________________________________________ maxim integrated products 1 top view 1 23 4 5 10 98 7 6 bstlx dh pgnd gnd fb comp hsd max1954a max dl in pin configuration 19-3154; rev 1; 5/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information part temp range pin-package max1954aeub -40 c to +85 c 10 ?ax max1954aeub+ -40 c to +85 c 10 ?ax evaluation kit available max is a registered trademark of maxim integrated products, inc. + denotes lead-free package. downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, fb to gnd...........................................................-0.3v to +6v lx to bst..................................................................-6v to +0.3v bst to gnd ............................................................-0.3v to +20v dh to lx ................................................... -0.3v to (v bst + 0.3v) dl, comp to gnd.......................................-0.3v to (v in + 0.3v) hsd to gnd..............................................................-0.3v to 14v pgnd to gnd .......................................................-0.3v to +0.3v continuous power dissipation (t a = +70 c) 10-pin ?ax (derate 5.6mw/ c above +70 c) ...........444mw operating temperature range ...........................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range ............................+65 c to +150 c lead temperature (soldering, 10s) .................................+300 c electrical characteristics(v in = 5v, v bst - v lx = 5v, t a = 0 c to +85 c , unless otherwise noted.) parameter conditions min typ max units general operating input voltage range 3.0 5.5 v hsd voltage range (note 1) 3.0 13.2 v quiescent supply current v fb = 1.5v 1 2 ma standby supply current v in = v bst = 5.5v, v hsd = 13.2v, lx = unconnected, comp = gnd 2 ma undervoltage-lockout trip level falling v in , 50mv (typ) hysteresis 2.5 2.7 2.9 v dc-dc controller output-voltage adjust range(v out ) maximum output voltage depends on external componentsand maximum duty cycle 0.8 v error amplifier fb regulation voltage -1.0 +0.8 +1.0 % transconductance 70 110 160 ? voltage gain 200 v/ v fb input leakage current v fb = 0.9v 50 500 na fb input common-mode range -0.1 +1.5 v comp output-voltage swing 0.80 2.36 v current-sense amplifiervoltage gain 3.15 3.5 3.85 v / v v fb = 0.8v 110 135 145 current-limit threshold v pgnd - v lx v fb = 0v 21 36 51 mv oscillator switching frequency max1954a 240 300 360 khz maximum duty cycle measured at dh 89 91 93 % minimum duty cycle v comp = 1.25v, lx = gnd, v bst = v in = 3.3v 2.5 3 % downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit _______________________________________________________________________________________ 3 electrical characteristics (continued)(v in = 5v, v bst - v lx = 5v, t a = 0 c to +85 c , unless otherwise noted.) parameter conditions min typ max units soft-start soft-start period 3.4 ms soft-start levels 12.5 mv fet drivers dh, dl output low voltage i sink = 10ma 0.1 v dh, dl output high voltage i source = 10ma v in - 0.1v or v bs t - 0.1v v dh pullup/pulldown, dl pullup on-resistance 1.5 3 ? dl pulldown on-resistance 1 2 ? lx, bst, hsd leakage current v bst = 18.7v, v lx = 13.2v, v in = 5.5v, v hsd = 13.2v 30 ? thermal protection thermal shutdown rising temperature, 15 c hysteresis +160 c shutdown control comp logic-level low 3v < v in < 5.5v 0.25 v comp logic-level high 3v < v in < 5.5v 0.8 v comp pullup current 100 ? electrical characteristics(v in = 5v, v bst - v lx = 5v, t a = -40 c to +85 c , unless otherwise noted.) (note 2) parameter conditions min max units general operating input voltage range 3.0 5.5 v hsd voltage range (note 1) 3.0 13.2 v quiescent supply current v fb = 1.5v 2 ma standby supply current v in = v bst = 5.5v, v hsd = 13.2v, lx = unconnected, comp = gnd 2 ma undervoltage lockout trip level rising v in 3% (typ) hysteresis 2.50 2.93 v dc-dc controller output-voltage adjust range(v out ) 0.8 0.9 x v in v error amplifier fb regulation voltage -2.5 +1.0 % transconductance 70 160 ? fb input leakage current v fb = 0.9v 500 na fb input common-mode range -0.1 +1.5 v comp output-voltage swing 0.8 2.2 v downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 4 _______________________________________________________________________________________ note 1: hsd and in are externally connected for applications where hsd < 5.5v. note 2: specifications to -40 c are guaranteed by design and not production tested. electrical characteristics (continued)(v in = 5v, v bst - v lx = 5v, t a = -40 c to +85 c , unless otherwise noted.) (note 2) parameter conditions min max units current-sense amplifiervoltage gain 3.15 3.85 v/v v fb = 0.8v 110 145 current-limit threshold v pgnd - v lx , max1954a v fb = 0v 21 51 mv oscillator switching frequency 240 360 khz maximum duty cycle measured at dh 89 93 % minimum duty cycle v comp = 1.25v, lx = gnd, v bst = v in = 3.3v 3 % fet drivers dh, dl output low voltage i sink = 10ma 0.1 v dh, dl output high voltage i source = 10ma v in - 0.1v or v bs t - 0.1v v dh pullup/pulldown, dl pullup on-resistance 3 ? dl pulldown on-resistance 2 ? lx, bst, hsd leakage current v bst = 18.7v, v lx = 13.2v, v in = 5.5v, v hsd = 13.2v 30 ? shutdown control comp logic-level low 3v < v in < 5.5v 0.25 v comp logic-level high 3v < v in < 5.5v 0.8 v comp pullup current 100 ? downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit _______________________________________________________________________________________ 5 typical operating characteristics (t a = +25?, unless otherwise noted.) efficiency vs. load current max1954a toc01 load current (a) efficiency (%) 100 40 50 60 70 80 90 0.1 1 10 v out = 2.5v v in = v hsd = 5v v out = 1.5v 2.602.55 2.50 2.45 2.40 02 1 345 output voltage vs. load current max1954a toc02 load current (a) output voltage (v) v in = v hsd = 5v -70 -30-50 10 -10 5030 70 3.0 4.0 3.5 4.5 5.0 5.5 output voltage change vs. input voltage max1954a toc03 input voltage (v) change in output voltage (mv) v out = 2.5v v out = 0.8v v in = v hsd i out = 5a 0.810.81 0.80 0.80 0.79 10.8 12.0 11.4 12.6 13.2 output voltage vs. input voltage max1954a toc04 input voltage (v) output voltage (v) v in = v hsd i out = 5a 250 270 310290 330 350 3.0 4.0 3.5 4.5 5.0 5.5 oscillator frequency vs. input voltage max1954a toc05 input voltage (v) oscillator frequency (khz) t a = -40 c t a = +85 c t a = +25 c v in = v hsd load transient max1954a toc06 40 s/div 100mv/div v out ac-coupled i out 5a/ s 5a 500ma downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 6 _______________________________________________________________________________________ typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) load transient max1954a toc07 40 s/div 100mv/div v out ac-coupled i out 5a/ s 5a 2.5a no-load switching waveforms max1954a toc08 2 s/div 2a/div i l dh lx dl 5v/div 10v/div5v/div heavy-load switching waveforms i load = 5a max1954a toc09 2 s/div 2a/div i l dh lx dl 5v/div 10v/div5v/div short circuit and recovery max1954a toc11 200 s/div 1v/div v out v in i lx 5a/div 2v/div i in 2a/div power-up/power-down waveforms max1954a toc10 4ms/div 5v/div v in v out i lx 5a/div 2v/div startup into prebiased output (output prebiased at ~1.7v) max1954a toc12 2ms/div 1v/div v out v in dl 5v/div 5v/div dh 5v/div downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit _______________________________________________________________________________________ 7 detailed description the max1954a single-output, current-mode, pwm, step-down dc-dc controller features foldback current limit and switches at 300khz for high efficiency. the max1954a is designed to drive a pair of external n- channel power mosfets in a synchronous buck topolo- gy to improve efficiency and cost compared with a p-channel power-mosfet topology. the on-resistance of the low-side mosfet is used for short-circuit current- limit sensing, while the high-side mosfet? on-resis- tance is used for current-mode feedback, thus eliminating the need for current-sense resistors. the short-circuit current limit is fixed at 135mv. the foldback current scheme reduces the input current during short- circuit and severe-overload conditions. the max1954a is configured with a high-side drain input (hsd) allowing an extended input voltage range of 3v to 13.2v that is independent of the ic input supply (figure 1). dc-dc converter control architecture the max1954a step-down converter uses a pwm, cur-rent-mode control scheme. an internal transconductance amplifier establishes an integrated error voltage. an open-loop comparator compares the integrated voltage- feedback signal against the amplified current-sense sig- nal plus the slope compensation ramp, which is summed into the main pwm comparator to preserve inner-loop sta- bility and eliminate inductor staircasing. at each rising edge of the internal clock, the high-side mosfet turns on until the pwm comparator trips or the maximum duty cycle is reached. during this on-time, current ramps up through the inductor, storing energy in a magnetic field and sourcing current to the output. the current-mode feedback system regulates the peak inductor current as a function of the output-voltage error signal. the circuit acts as a switch-mode transconductance amplifier because the average inductor current is close to the peak inductor current (assuming the inductor is large enough to provide a reasonably small ripple current). this pushes the output inductance-capacitance filter pole normally found in a voltage-mode pwm to a higher frequency. pin name function 1 hsd high-side drain current-sense input. hsd senses the voltage at the drain of the high-side, n-channel mosfet.connect to the high-side mosfet drain using a kelvin connection. 2 comp compensation and shutdown control pin. connect appropriate rc networks to compensate the control loop.pull to gnd to shut down the ic. see the compensation design section for instructions on calculating the rc values. 3 fb feedback input. regulates at v fb = 0.8v. connect fb to the center tap of a resistor-divider from the output to gnd to set the output voltage. 4 gnd ground 5 in ic supply voltage. provides power for the ic. connect to a 3v to 5.5v power supply. bypass to gnd with a0.22? ceramic capacitor and to pgnd with a 1? ceramic capacitor. 6 dl low-side gate-drive output. drives the synchronous-rectifier mosfet. swings from 0 to v in . dl is low in shutdown and uvlo. 7 pgnd power ground 8 dh high-side gate-drive output. drives the high-side n-channel mosfet. dh is a floating driver output that swingsfrom v lx to v bst . dh is low in shutdown and uvlo. 9 lx controller current-sense input. connect lx to the junction of the mosfets and inductor. lx is the referencepoint for the current limit. 10 bst high-side mosfet supply input. connect a 0.1? ceramic capacitor from bst to lx to supply the necessarygate drive for the high-side n-channel mosfet. pin description downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 8 _______________________________________________________________________________________ during the second half of the cycle, the high-side mosfet turns off and the low-side mosfet turns on. the inductor releases the stored energy as the current ramps down, providing current to the output. the output capaci- tor stores charge when the inductor current exceeds the required load current and discharges when the inductor current is lower, smoothing the voltage across the load. under overload conditions, when the inductor current exceeds the current limit (see the current-limit circuit section), the high-side mosfet is not turned on at the ris-ing clock edge and the low-side mosfet remains on to let the inductor current ramp down. the max1954a operates in a forced-pwm mode; there-fore, the controller maintains a constant switching fre- quency, regardless of load, to allow for easier post- filtering of the switching noise. current-sense amplifier the current-sense circuit amplifies the current-sensevoltage (the high-side mosfet? on-resistance (r ds(on) ) multiplied by the inductor current). this ampli- fied current-sense signal and the internal slope-compen-sation signal are summed (v sum ) together and fed into the pwm comparator? inverting input. the pwm com-parator shuts off the high-side mosfet when v sum exceeds the integrated feedback voltage (v comp ). reference and soft-start digital-to-analog converter foldback current- limit circuitry fb comp 0.5v shutdown comparator error amplifier slope compensation thermal limit uvlo pwm control circuitry clock short-circuit current-limit circuitry current-limit comparator pgnd 2.36vclamp gnd dl in lx current- sense circuitry dh bst hsd in max1954a functional diagram downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit _______________________________________________________________________________________ 9 place the high-side mosfet as close as possible tothe controller and connect hsd and lx to the mosfet using kelvin-sense connections to guarantee current- sense accuracy and improve stability. current-limit circuit the current-limit circuit employs a lossless, foldback,valley current-limiting algorithm that uses the low-side mosfet? on-resistance as the sensing element. once the high-side mosfet turns off, the voltage across thelow-side mosfet is monitored. if the voltage across the low-side mosfet (r ds(on) x i inductor ) does not exceed the current limit, the high-side mosfet turns onnormally. in this condition, the output drops smoothly out of regulation. if the voltage across the low-side mosfet exceeds the current-limit threshold at the beginning of a new oscillator cycle, the low-side mosfet remains on and the high-side mosfet remains off. typical application circuits hsdcomp n1 l1 c4 d1 c f r c c1 c2 c5 c c c3 c6 r3 r1r2 gnd bst dh lx dl pgnd fb in max1954a v out 1.8v v in 3v to 5.5v v hsd 5.5v to 13.2v figure 1. max1954a typical application circuit incomp n1 l1 0.8 h c70.1 f d1 c f 15pf r c 270k ? c c 560pf c1 0.22 f c15 c14 r3 r1 10k ? c8?13 270 f c2?6 10 f r2 8.06k ? gnd bst dh lx dl pgnd fb hsd max1954a v out +1.8v at 20a v hsd 10.8v to 13.2v v in 3v to 5.5v n2 n3 n4 figure 2. max1954a circuit capable of 20a output downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 10 ______________________________________________________________________________________ when the output is shorted, the foldback current limitreduces the current-limit threshold linearly to 20% of the nominal value to reduce the power dissipation of components and the input current. once the voltage across the low-side mosfet drops below the current- limit threshold, the high-side mosfet is turned on at the next clock cycle. during severe-overload and short- circuit conditions, the frequency of the max1954a appears to decrease because the on-time of the low-side mosfet extends beyond a clock cycle. the current-limit threshold is preset to 135mv. in addition to the valley current limit, the max1954a also features a cycle-by-cycle peak-current clamp that limits the voltage across the high-side mosfet by ter- minating its on-time. this, together with the valley fold- back current limit, provides a very robust overload and short-circuit protection. synchronous-rectifier driver (dl) synchronous rectification reduces conduction losses inthe rectifier by replacing the normal schottky catch diode with a low-resistance mosfet switch. the max1954a also uses the synchronous rectifier to ensure proper startup of the boost gate-driver circuit and to provide the current-limit signal. the dl low-side wave- form is always the complement of the dh high-side drive waveform (with controlled dead time to prevent crossconduction or shoot-through). a dead-time circuit monitors the dl output and prevents the high-side mosfet from turning on until dl is fully off. for the dead-time circuit to work properly, there must be a low- resistance, low-inductance path from the dl driver to the mosfet gate. otherwise, the sense circuitry in the max1954a interprets the mosfet gate as off although gate charge actually remains. use very short, wide traces (50 mils to 100 mils wide if the mosfet is 1in from the device). the dead time at the other edge (dh turning off) is also determined through gate sensing. high-side gate-drive supply (bst) gate-drive voltage for the high-side, n-channel switchis generated by a flying-capacitor boost circuit (figure 3). the capacitor between bst and lx is charged from the v in supply up to v in minus the diode drop while the low-side mosfet is on. when the low-side mosfet isswitched off, the stored voltage of the capacitor is stacked above lx to provide the necessary turn-on voltage (v gs ) for the high-side mosfet. the controller then closes an internal switch between bst and dh toturn the high-side mosfet on. undervoltage lockout (uvlo) if v in drops below 2.7v, the max1954a assumes that the supply voltage is too low for proper circuit opera-tion, so the uvlo circuitry inhibits switching and forces the dl and dh gate drivers low. after v in rises above 2.7v, the controller goes into the startup sequence andresumes normal operation. startup the max1954a begins switching when v in rises above the uvlo threshold. however, the controller is notenabled unless five conditions are met: 1) v in exceeds the 2.7v uvlo threshold. 2) the internal reference exceeds 92% of its nominal value (v ref > 1v). 3) the internal bias circuitry powers up. 4) the thermal-overload limit is not exceeded. 5) the feedback voltage is below the regulation threshold. if these conditions are met, the step-down controllerenables soft-start and begins switching. the soft-start cir- cuitry gradually ramps up the output voltage until the volt- age at fb is equal to the reference voltage. this controls the rate of rise of the output voltage and reduces input surge currents during startup. the soft-start period is 1024 clock cycles (1024 / f s ). the output voltage is incre- mented through 64 equal steps. the output reaches reg-ulation when soft-start is completed, regardless of output capacitance and load. the max1954a also has internal circuitry to prevent discharging of a precharged output capacitor during soft-start or in uvlo. this feature (monotonic startup) is needed in applications where the max1954a output is connected in parallel with another power-supply output, such as redundant-power or standby-power applications. nn bst dh lx dl in max1954a figure 3. dh boost circuit downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit ______________________________________________________________________________________ 11 table 1. suggested components part designator max1954a (figure 1) 20a circuit (figure 2) c1 0.22?, 10v x7r ceramic capacitorkemet c0603c224m8rac 0.22?, 10v x7r ceramic capacitorkemet c0603c224m8rac c2 1?, 6.3v x5r ceramic capacitortaiyo yuden jmk212bj106mg 10?, 16v x5r ceramic capacitortaiyo yuden emk325bj106mn c3 10?, 16v x5r ceramic capacitortaiyo yuden emk325bj106mn 10?, 16v x5r ceramic capacitortaiyo yuden emk325bj106mn c4 0.1?, 6.3v x7r ceramic capacitor 10?, 16v x5r ceramic capacitortaiyo yuden emk325bj106mn c5 180?, 4v sp polymer capacitorpanasonic eefueog181r 10?, 16v x5r ceramic capacitortaiyo yuden emk325bj106mn c6 1500pf, 50v x7r ceramic capacitortdk c1608x7r1h152k 10?, 16v x5r ceramic capacitortaiyo yuden emk325bj106mn c7 0.1?, 50v x7r ceramic capacitortaiyo yuden umk107bj104ka c8 270?, 2v sp polymer capacitorpanasonic eefueod271r c9?13 270?, 2v sp polymer capacitorspanasonic eefueod271r cc 680pf, 10v x7r ceramic capacitorkemet c0402c681m8rac 560pf, 10v x7r ceramic capacitorkemet c0402c561m8rac c f 15pf, 10v c0g ceramic capacitorkemet c0402c150k8gac r1 16.9k ? ?% resistor 10k ? ?% resistor r2 8.06k ? ?% resistor 8.06k ? ?% resistor r3 2 ? ?% resistor r c 62k ? ?% resistor 270k ? ?% resistor d1 schottky diodecentral semiconductor cmpsh1-4 schottky diodecentral semiconductor cmpsh1-4 n1, n2 20v, 5a dual mosfetsfairchild fds6898a 30v n-channel mosfets international rectifier irf7811 n3, n4 30v n-channel mosfets siliconix si4842dy l1 1?, 3.6a inductortoko 817fy-1r0m 0.8?, 27.5a inductorsumida cep125u-0r8 downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 12 ______________________________________________________________________________________ shutdown the max1954a features a low-power shutdown mode.use an open-collector, npn transistor to pull comp low and shut down the ic. comp must be pulled below 0.25v to shut down the max1954a. choose a transistor with a v ce(sat) below 0.25v. during shutdown, the out- put is high impedance. shutdown reduces the quies-cent current (i q ) to 220? (typ). note that implementing shutdown in this fashion discharges the output onlyuntil the inductor runs out of energy. upon recovery, soft-start is not available. only the foldback current limit results in pseudo-soft-start mode. thermal-overload protection thermal-overload protection limits total power dissipa-tion in the max1954a. when the junction temperature exceeds t j = +160 c, an internal thermal sensor shuts down the ic, allowing the ic to cool. the thermal sensorturns the ic on again after the junction temperature cools by 15 c, resulting in a pulsed output during con- tinuous thermal-overload conditions. design procedures setting the output voltage to set the output voltage for the max1954a, connectfb to the center of an external resistor-divider from the output to gnd (figures 1 and 2). select r2 between 8k ? and 24k ? , and calculate r1 by: where v fb = 0.8v. r1 and r2 should be placed as close as possible to the ic. inductor value there are several parameters that must be examinedwhen determining which inductor to use. input voltage, output voltage, load current, switching frequency, and lir. lir is the ratio of inductor current ripple to dc load current. a higher lir value allows for a smaller induc- tor, but results in higher losses and higher output rip- ple. a good compromise between size and efficiency is an lir of 30%. once all of the parameters are chosen, the inductor value is determined as follows: where f s is the switching frequency. choose a standard value close to the calculated value. the exact inductorvalue is not critical and can be adjusted to make trade- offs among size, cost, and efficiency. lower inductor val- ues minimize size and cost, but they also increase theoutput ripple and reduce the efficiency due to higher peak currents. on the other hand, higher inductor values increase efficiency, but eventually resistive losses, due to extra turns of wire, exceed the benefit gained from lower ac levels. find a low-loss inductor with the lowest possi- ble dc resistance that fits the allotted dimensions. ferrite cores are often the best choice. however, powdered iron is inexpensive and can work well at 300khz. the chosen inductor? saturation current rating must exceed the peak inductor current determined as: setting the current limit the max1954a uses a valley current-sense method forcurrent limiting. the voltage drop across the low-side mosfet due to its on-resistance is used to sense the inductor current. the voltage drop across the low-side mosfet at the valley point and at i load(max) is: the calculated v valley must be less than the minimum current-limit threshold specified.additionally, the high-side mosfet r ds(on) must meet the following equation to avoid tripping the internalpeak-current clamp circuit prematurely: r ds(on) < 0.8v / (3.65 x (i load(max) x ( 1 + lir / 2))) use the maximum r ds(on) value at the desired maxi- mum operating junction temperature of the mosfet. agood general rule is to allow 0.5% additional resistance for each c of mosfet junction-temperature rise. mosfet selection the max1954a drives two external, logic-level, n-chan-nel mosfets as the circuit-switch elements. the key selection parameters are: 1) on-resistance (r ds(on) ): the lower, the better. however, the current-sense signal (r ds x i peak ) must be greater than 16mv at maximum load. 2) maximum drain-to-source voltage (v dss ): it should be at least 20% higher than the input supply rail atthe high-side mosfet? drain. 3) gate charges (q g , q gd , q gs ): the lower, the better. for a 3.3v input application, choose a mosfet with arated r ds(on) at v gs = 2.5v. for a 5v input application, choose the mosfets with rated r ds(on) at v gs 4.5v. for a good compromise between efficiency and cost, vr i lir i valley ds on load max load max = ?? ? ?? ? () () () ( ) 2 ii lir i peak load max load max =+ ?? ? ?? ? () () 2 l vvv v f i lir out in out in s load max = () () rr v v out fb 12 1 = ?? ? ?? ? downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit ______________________________________________________________________________________ 13 choose the high-side mosfet (n1) that has conductionlosses equal to switching loss at nominal input voltage and output current. the selected mosfets must have an r ds(on) that satisfies the current-limit setting condition above. for n2, ensure that it does not spuriously turn ondue to dv/dt caused by n1 turning on, as this would result in shoot-through current degrading the efficiency. mosfets with a lower q gd /q gs ratio have higher immuni- ty to dv/dt.for proper thermal-management design, the power dis- sipation must be calculated at the desired maximum operating junction temperature, t j(max) . n1 and n2 have different loss components due to the circuit oper-ation. n2 operates as a zero-voltage switch; therefore, major losses are the channel-conduction loss (p n2cc ) and the body-diode conduction loss (p n2dc ). where v f is the body-diode forward-voltage drop, t dt is the dead time between n1 and n2 switching transitions,f s is the switching frequency, and t dt is 20ns (typ). n1 operates as a duty-cycle control switch and has thefollowing major losses: the channel-conduction loss (p n1cc ), the vl overlapping switching loss (p n1sw ), and the drive loss (p n1dr ). n1 does not have body- diode conduction loss, because the diode never con-ducts current. where i gate is the average dh-driver output current capability determined by:where r ds(on)(n2) is the high-side mosfet driver? on-resistance (1.5 ? typ) and r gate is the internal gate resistance of the mosfet (~2 ? ). where v gs ~v in. in addition to the losses above, allow approximately20% for additional losses due to mosfet output capac- itances and n2 body-diode reverse-recovery charge dissipated in n1 that exists, but is not well defined, in the mosfet data sheet. refer to the mosfet data sheet for thermal-resistance specification to calculate the pc board area needed to maintain the desired maxi- mum operating junction temperature with the above cal- culated power dissipations. to reduce electromagnetic interference (emi) caused by switching noise, add a 0.1? ceramic capacitor from the high-side switch drain to the low-side switch source or add resistors in series with dh and dl to slow down the switching transitions. however, adding series resis- tors increases the power dissipation of the mosfet, so be sure this does not overheat the mosfet. the minimum load current must exceed the high-side mosfet? maximum leakage-current overtemperature if fault conditions are expected. mosfet snubber circuit fast-switching transitions cause ringing because ofresonating circuit parasitic inductance and capaci- tance at the switching nodes. this high-frequency ring- ing occurs at lx? rising and falling transitions and can interfere with circuit performance and generate emi. to dampen this ringing, a series rc snubber circuit is added across each switch. below is the procedure for selecting the value of the series rc circuit: 1) connect a scope probe to measure the voltage from lx to gnd, and observe the ringing frequen-cy, f r . 2) find the capacitor value (connected from lx to gnd) that reduces the ringing frequency by half. the circuit parasitic capacitance (c par ) at lx is then equal to 1/3rd of the value of the added capacitanceabove. the circuit parasitic inductance (l par ) is calculat- ed by:the resistor for critical dampening (r snub ) is equal to 2 x f r x l par . adjust the resistor value up or down to tailor the desired damping and the peak voltage excur-sion. the capacitor (c snub ) should be at least two to four times the value of the c par to be effective. the power loss of the snubber circuit (p rsnub ) is dissipat- ed in the resistor r snub and can be calculated as: pcvf rsnub snub in s = () 2 l fc par r par = () 1 2 2 pqvf r rr ndr g gs s gate gate ds on n 1 2 = + ()() i v rr gate in ds on n gate . ()() ? + 05 2 . () () ( ) p v v ir use r at t pvi qq i f ncc out in load ds on ds on j max n sw in load gs gd gate s 1 2 1 = ?? ? ?? ? = + ?? ?? ?? ?? ( . () ( ) () ( ) vr i lir i use r at t pi v t f valley ds on load max load max ds on j max n dc load f dt s = ?? ? ?? ? = () 2 2 2 downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 14 ______________________________________________________________________________________ where v in is the input voltage and f s is the switching frequency. choose a r snub power rating that meets the specific application? derating rule for the powerdissipation calculated. input capacitor the input filter capacitor reduces peak currents drawnfrom the power source and reduces noise and voltage ripple on the input caused by the circuit? switching. the input capacitor must meet the ripple current requirement (i rms ) imposed by the switching currents defined by the following equation:i rms has a maximum value when the input voltage equals twice the output voltage (v in = 2 x v out ); there- fore, i rms(max) = i load / 2. ceramic capacitors are recommended due to their low equivalent series resis-tance (esr) and equivalent series inductance (esl) at high frequencies, and their relatively low cost. choose a capacitor that exhibits less than 10 c temperature rise at the maximum operating root-mean-square (rms)current for optimum long-term reliability. output capacitor the key selection parameters for the output capacitorare the actual capacitance value, esr, esl, and the voltage-rating requirements. these parameters affect the overall stability, output voltage ripple, and transient response. the output ripple has three components: vari- ations in the charge stored in the output capacitor, and the voltage drop across the capacitor? esr and esl caused by the current into and out of the capacitor. the equation below estimates the maximum ripple voltage: the output voltage ripple as a consequence of the esr, output capacitance, and esl are as follows: where i p-p is the peak-to-peak inductor current (see the inductor value section). these equations are suitable for initial capacitor selection, but final values should bechosen based on a prototype or evaluation circuit. as a general rule, a smaller current ripple results in less out- put voltage ripple. since the inductor ripple current is a factor of the inductor value and input voltage, the out- put voltage ripple decreases with larger inductance, and increases with higher input voltages. for the max1954a polymer, tantalum, or aluminum electrolytic capacitors are recommended. lower-cost aluminum electrolytic capacitors with relatively low esr are avail- able and can be used for the max1954a, if the larger physical size is acceptable. for reliable and safe oper- ation, ensure that the capacitor? voltage and ripple- current ratings exceed the calculated values. the devices?response to a load transient depends on the selected output capacitors. after a load transient, the output voltage instantly changes by esr x ? i load . before the controller can respond, the output voltagedeviates further depending on the inductor and output capacitor values. after a short period of time (see the typical operating characteristics ), the controller responds by regulating the output voltage back to itsnominal state. the controller response time depends on its closed-loop bandwidth. with a higher bandwidth, the response time is faster, thus preventing the output volt- age from deviating further from its regulation value. compensation design the max1954a uses an internal transconductanceerror amplifier whose output compensates the control loop. the external inductor, high-side mosfet, output capacitor, compensation resistor, and compensation capacitors determine the loop stability. the inductor and output capacitors are chosen based on perfor- mance, size, and cost. additionally, the compensation resistor and capacitors are selected to optimize control- loop stability. the component values in figures 1 and 2 yield stable operation over the given range of input-to- output voltages and load currents. the controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. the max1954a uses the voltage across the high-side mosfet? on-resistance (r ds(on) ) to sense the inductor current. current-mode control eliminates the double pole in the feedback loopcaused by the inductor and output capacitor, resulting in a smaller phase shift and requiring less elaborate error-amplifier compensation. a single-series compen- sation resistor (r c ) and compensation capacitor (c c ) is all that is needed to have a stable high-bandwidth loopin applications where ceramic capacitors are used for v i esr v i cf v v l esl i vv fl v v ripple esr pp ripple c pp out s ripple esl in pp in out s out in () () () = = ?? ? ?? ? = ?? ? ?? ? ?? ? ?? ? = 8 vv v v ripple ripple esr ripple c ripple esl =++ () () ( ) i ivv v v rms load out in out in = () downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit ______________________________________________________________________________________ 15 output filtering. for other types of capacitors, due to thehigher capacitance and esr, the frequency of the zero created by the capacitance and esr is lower than the desired closed-loop crossover frequency. another compensation capacitor should be added to cancel this zero. the basic regulator loop can be thought of as a power modulator, output feedback divider, and an error ampli- fier. the power modulator has dc gain set by g mc x r load , with a pole and zero pair set by r load , the out- put capacitor (c out ) and its equivalent series resis- tance (r esr ). below are equations that define the power modulator:where r load = v out / i out(max) , and g mc = 1 / (a cs x r ds(on) ), where a cs is the gain of the current-sense amplifier and r ds(on) is the on-resistance of the high- side power mosfet. a cs is 3.5. the frequencies at which the pole and zero due to the power modulatoroccur are determined as follows: the feedback voltage-divider used has a gain of g fb = v fb / v out , where v fb is equal to 0.8v. the transcon- ductance error amplifier has dc gain, g ea(dc) = g m x r o . the amplifier output resistance (r o ) is typically 10m ? . the c c , r o , and the r c set a dominant pole. the r c and the c c set a zero. there is an optional pole set by c f and r c to cancel the output-capacitor esr zero if it occurs before crossover frequency (f c ): the f c should be much higher than the power modula- tor pole f pmod . also, the crossover frequency should be less than 1/8th of the switching frequency:therefore, the loop-gain equation at the crossover fre- quency is: when f zmod is greater than f c : then r c is calculated as: where g mea = 110?. the error-amplifier compensation zero formed by r c and c c should be set at the modulator pole f pmod . c c is calculated by:if f zmod is less than 5 x f c , add a second compensa- tion capacitor, c f , from comp to gnd to cancel the esr zero. c f is calculated by: as the load current decreases, the modulator pole alsodecreases. however, the modulator gain increases accordingly and the crossover frequency remains the same. when f zmod is less than f c , the power-modulator gain at f c is: gg f f mod fc mod dc pmod zmod () ( ) = c rf f c zmod = 1 2 c rf l c rf l r c load s out load s c = + () ( ) r v gvg c out mea fb mod fc = () g g r and g g r f f ea fc mea c mod fc mc load pmod c () () = = gg v v ea fc mod fc fb out () () = 1 ff f pmod c s << < 8 f crr f cr f cr pdea coc zea cc pea fc = + = = 1 2 1 2 1 2 () f c rf l rfl r f cr pmod out load s load s esr zmod out esr = + + ?? ? ?? ? = 1 2 1 2 gg rf l rf l mod mc load s load s = + downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit 16 ______________________________________________________________________________________ the error-amplifier gain at f c is: r c is then calculated as: c c and c f can then be calculated as: applications information see table 2 for suggested manufacturers of the com- ponents used with the max1954a. pc board layout guidelines careful pc board layout is critical to achieve lowswitching losses and clean, stable operation. the switching power stage requires particular attention. follow these guidelines for good pc board layout: 1) place ic decoupling capacitors as close as possible to ic pins. keep separate the power-ground plane(connected to pin 7) and the signal-ground plane (connected to pin 4). the in pin has two decoupling capacitors. one connects to pin 7 and one connects to pin 4. 2) place the mosfets?decoupling capacitors as close as possible and place them directly acrossfrom the high-side mosfet drain and the low-side mosfet source. 3) input and output capacitors are connected to the power-ground plane; all other capacitors are con-nected to the signal-ground plane. 4) keep the high-current paths as short as possible. 5) connect the drain leads of the power mosfet to a large copper area to help cool the device. refer tothe power mosfet data sheet for recommended copper area. 6) connect hsd directly to the drain leads of the high- side mosfet. 7) connect lx directly to the drain of the low-side mosfet. 8) place the low-side mosfet so that its source is as close as possible to pin 7. 9) ensure all feedback connections are short and direct. place the feedback resistors as close aspossible to the ic. 10) route high-speed switching nodes away from sen- sitive analog areas (fb, comp). 11)the trace length from the gates of the low-side and high-side mosfets to dh and dl should be nolonger than 700 mils. to aid design, a sample layout is available in themax1954a evaluation kit. c rfl c rf l r c rf c load s out load s c f c zmod = + () = 1 2 r v v f gf g c out fb c mea zmod mod fc = () ggr f f ea fc mea c zmod c () = table 2. suggested manufacturers manufacturer component phone website central semiconductor diodes 631-435-1110 www.centralsemi.com coilcraft inductors 800-322-2645 www.coilcraft.com fairchild mosfets 800-341-0392 www.fairchildsemi.com kemet capacitors 864-963-6300 www.kemet.com panasonic capacitors 714-373-7366 www.panasonic.com taiyo yuden capacitors 408-573-4150 www.t-yuden.com toko inductors 800-745-8656 www.toko.com downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit ______________________________________________________________________________________ 17 hsdcomp nn gnd bst dh lx dl pgnd fb in max1954a v out 0.8v to 0.93 v in v in 3v to 5.5v v hsd 5.5v to 13.2v typical operating circuit chip information transistor count: 2963process: bicmos downloaded from: http:///
max1954a low-cost, current-mode pwm buck controller with foldback current limit maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) 10lumax.eps package outline, 10l umax/usop 1 1 21-0061 i rev. document control no. approval proprietary information title: top view front view 1 0.498 ref 0.0196 ref s 6 side view bottom view 0 0 6 0.037 ref 0.0078 max 0.006 0.043 0.118 0.120 0.199 0.0275 0.118 0.0106 0.120 0.0197 bsc inches 1 10 l1 0.0035 0.007 e c b 0.187 0.0157 0.114 h l e2 dim 0.116 0.114 0.116 0.002 d2 e1 a1 d1 min - a 0.940 ref 0.500 bsc 0.090 0.177 4.75 2.89 0.40 0.200 0.270 5.05 0.70 3.00 millimeters 0.05 2.89 2.95 2.95 - min 3.00 3.05 0.15 3.05 max 1.10 10 0.60.1 0.60.1 0.500.1 h 4x s e d2 d1 b a2 a e2 e1 l l1 c gage plane a2 0.030 0.037 0.75 0.95 a1 downloaded from: http:///

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